This invention relates to the field of non-volatile semiconductor memory devices. More particularly, this invention relates to an improved semiconductor memory device of the insulated gate field effect transistor (IGFET) type and a method of fabricating same.
Non-volatile semiconductor memory devices are known which typically employ a large scale integration (LSI) array of individual IGFET elements with suitable interconnections to function as a multibit storage device, such as a read only memory (ROM), a read mostly memory (RMM), an electronically alterable read only memory (EAROM), a random access memory (RAM) or the like. Each IGFET element typically comprises a semiconductor substrate material of a first conductivity type, a pair of source and drain diffusion regions of opposite conductivity type from the substrate separated by an interstitial portion of the substrate material, an overlying field oxide layer of minimum thickness in the region overlying the interstitial substrate portion, a layer of a dielectric material over the field oxide and a gate electrode metallization layer overlying the dielectric material. The IGFET element can be operated as a two-state memory device by virtue of the variable threshold switching property exhibited by devices of this type. In a conventional field effect transistor, the threshold voltage which must be applied between the gate and the source electrodes to cause substantial current conduction between the drain and the source electrodes is fixed. In IGFET devices, on the other hand, this threshold can be altered by applying a relatively large potential difference between the gate electrode and the substrate. The threshold voltage may be altered back to an initial level by applying a relatively large potential difference of opposite polarity between the gate and the substrate. If the two different threshold voltages are well defined and of sufficiently different magnitude, an IGFET may be operated as a bistable memory device by arbitrarily assigning one and zero values to the different threshold voltages, selectively altering the threshold voltage and subsequently interrogating the IGFET with a voltage whose magnitude lies between the two different threshold voltages while sensing the source-to-drain current. Circuits have been designed employing IGFET as bistable memory elements, and several representative circuits are shown in U.S. Pat. No. 3,636,530.
Metal-nitride-oxide-silicon (MNOS) IGFET memory devices using silicon nitride as the dielectric element have been fabricated for use as bistable memory elements and, while MNOS implementation has many theoretical advantages, the performance of such devices has been found unsatisfactory for several reasons. In order to be commercially acceptable, the cost of each IGFET must be kept to a minimum by employing LSI semiconductor fabrication techniques with relatively high yield. In addition, each IGFET must have the capacity to remain at either threshold voltage state for a relatively long period of time in order to be useful as a non-volatile memory element. Efforts to date to fabricate MNOS IGFETS of consistent quality and performance and acceptable retention periods have not yet met with success.